Design of Experiments for Reinforcement Learning

New Data Structures and Algorithms for Logic Synthesis and Verification

Digital Logic Design Using Verilog Coding and RTL Synthesis

Principles and Structures of FPGAs

Simulation and Optimization of Digital Circuits Considering and Mitigating Destabilizing Factors

A First Introduction to Quantum Computing and Information

Introduction to Logic Circuits & Logic Design with Verilog

Separation Logic for High-level Synthesis

Introduction to Logic Circuits & Logic Design with VHDL

Logics for Computer Science Classical and Non-Classical

ASIC/SoC Functional Design Verification A Comprehensive Guide to Technologies and Methodologies

Automated Deduction – CADE 26 26th International Conference on Automated Deduction, Gothenburg, Sweden, August 6–11, 2017, Proceedings