Formal Specification Level Concepts, Methods, and Algorithms

Protecting Chips Against Hold Time Violations Due to Variability

Model-Driven Design Using IEC 61499 A Synchronous Approach for Embedded and Automation Systems

The Boundary-Scan Handbook

Exploring Memory Hierarchy Design with Emerging Memory Technologies

Trace-Based Post-Silicon Validation for VLSI Circuits

Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs

Invasive Tightly Coupled Processor Arrays

3D Stacked Chips From Emerging Processes to Heterogeneous Systems

Spintronics-based Computing

Heterogeneous Reconfigurable Processors for Real-Time Baseband Processing From Algorithm to Architecture

Soft Error Mechanisms, Modeling and Mitigation