Search Results for Logic design. - Narrowed by: Electronic Book - Circuits and Systems.SirsiDynix Enterprisehttps://catalog.tedu.edu.tr/client/tr_TR/defaulttr/defaulttr/qu$003dLogic$002bdesign.$0026qf$003dITYPE$002509Materyal$002bT$0025C3$0025BCr$0025C3$0025BC$0025091$00253AE-BOOKS$002509Electronic$002bBook$0026qf$003dSUBJECT$002509Konu$002509Circuits$002band$002bSystems.$002509Circuits$002band$002bSystems.$0026ps$003d300?2024-08-22T20:54:50ZDesign of Reconfigurable Logic Controllersent://SD_ILS/0/SD_ILS:170942024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Karatkevich, Andrei. editor.<br/><a href="http://dx.doi.org/10.1007/978-3-319-26725-8">http://dx.doi.org/10.1007/978-3-319-26725-8</a><br/>Format: Electronic Resources<br/>Introduction to Logic Circuits & Logic Design with Verilogent://SD_ILS/0/SD_ILS:2253862024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar LaMeres, Brock J. author.<br/><a href="https://doi.org/10.1007/978-3-319-53883-9">https://doi.org/10.1007/978-3-319-53883-9</a><br/>Format: Electronic Resources<br/>Introduction to Logic Circuits & Logic Design with VHDLent://SD_ILS/0/SD_ILS:2241852024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar LaMeres, Brock J. author.<br/><a href="https://doi.org/10.1007/978-3-319-34195-8">https://doi.org/10.1007/978-3-319-34195-8</a><br/>Format: Electronic Resources<br/>Digital Logic Design Using Verilog Coding and RTL Synthesisent://SD_ILS/0/SD_ILS:187922024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Taraate, Vaibbhav. author.<br/><a href="http://dx.doi.org/10.1007/978-81-322-2791-5">http://dx.doi.org/10.1007/978-81-322-2791-5</a><br/>Format: Electronic Resources<br/>Principles and Structures of FPGAsent://SD_ILS/0/SD_ILS:2218482024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Amano, Hideharu. editor.<br/><a href="https://doi.org/10.1007/978-981-13-0824-6">https://doi.org/10.1007/978-981-13-0824-6</a><br/>Format: Electronic Resources<br/>Introduzione al Progetto di Sistemi Digitalient://SD_ILS/0/SD_ILS:2240142024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Donzellini, Giuliano. author.<br/><a href="https://doi.org/10.1007/978-88-470-3963-6">https://doi.org/10.1007/978-88-470-3963-6</a><br/>Format: Electronic Resources<br/>Fundamentals of Electronic Systems Designent://SD_ILS/0/SD_ILS:2241092024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Lienig, Jens. author.<br/><a href="https://doi.org/10.1007/978-3-319-55840-0">https://doi.org/10.1007/978-3-319-55840-0</a><br/>Format: Electronic Resources<br/>New Data Structures and Algorithms for Logic Synthesis and Verificationent://SD_ILS/0/SD_ILS:2239642024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Amaru, Luca Gaetano. author.<br/><a href="https://doi.org/10.1007/978-3-319-43174-1">https://doi.org/10.1007/978-3-319-43174-1</a><br/>Format: Electronic Resources<br/>Reliable and Energy Efficient Streaming Multiprocessor Systemsent://SD_ILS/0/SD_ILS:2245582024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Das, Anup Kumar. author.<br/><a href="https://doi.org/10.1007/978-3-319-69374-3">https://doi.org/10.1007/978-3-319-69374-3</a><br/>Format: Electronic Resources<br/>Simulation and Optimization of Digital Circuits Considering and Mitigating Destabilizing Factorsent://SD_ILS/0/SD_ILS:2212192024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Melikyan, Vazgen. author.<br/><a href="https://doi.org/10.1007/978-3-319-71637-4">https://doi.org/10.1007/978-3-319-71637-4</a><br/>Format: Electronic Resources<br/>Testing of Interposer-Based 2.5D Integrated Circuitsent://SD_ILS/0/SD_ILS:2238932024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Wang, Ran. author.<br/><a href="https://doi.org/10.1007/978-3-319-54714-5">https://doi.org/10.1007/978-3-319-54714-5</a><br/>Format: Electronic Resources<br/>Design of FPGA-Based Computing Systems with OpenCLent://SD_ILS/0/SD_ILS:2254812024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Waidyasooriya, Hasitha Muthumala. author.<br/><a href="https://doi.org/10.1007/978-3-319-68161-0">https://doi.org/10.1007/978-3-319-68161-0</a><br/>Format: Electronic Resources<br/>ASIC/SoC Functional Design Verification A Comprehensive Guide to Technologies and Methodologiesent://SD_ILS/0/SD_ILS:2243732024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Mehta, Ashok B. . author.<br/><a href="https://doi.org/10.1007/978-3-319-59418-7">https://doi.org/10.1007/978-3-319-59418-7</a><br/>Format: Electronic Resources<br/>From Variability Tolerance to Approximate Computing in Parallel Integrated Architectures and Acceleratorsent://SD_ILS/0/SD_ILS:2250912024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Rahimi, Abbas. author.<br/><a href="https://doi.org/10.1007/978-3-319-53768-9">https://doi.org/10.1007/978-3-319-53768-9</a><br/>Format: Electronic Resources<br/>Advanced Symbolic Analysis for VLSI Systems Methods and Applicationsent://SD_ILS/0/SD_ILS:199062024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Shi, Guoyong. author.<br/><a href="http://dx.doi.org/10.1007/978-1-4939-1103-5">http://dx.doi.org/10.1007/978-1-4939-1103-5</a><br/>Format: Electronic Resources<br/>High Performance Integer Arithmetic Circuit Design on FPGA Architecture, Implementation and Design Automationent://SD_ILS/0/SD_ILS:187572024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Palchaudhuri, Ayan. author.<br/><a href="http://dx.doi.org/10.1007/978-81-322-2520-1">http://dx.doi.org/10.1007/978-81-322-2520-1</a><br/>Format: Electronic Resources<br/>Separation Logic for High-level Synthesisent://SD_ILS/0/SD_ILS:2253752024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Winterstein, Felix. author.<br/><a href="https://doi.org/10.1007/978-3-319-53222-6">https://doi.org/10.1007/978-3-319-53222-6</a><br/>Format: Electronic Resources<br/>Collaborative Design for Embedded Systems Co-modelling and Co-simulationent://SD_ILS/0/SD_ILS:239562024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Fitzgerald, John. editor.<br/><a href="http://dx.doi.org/10.1007/978-3-642-54118-6">http://dx.doi.org/10.1007/978-3-642-54118-6</a><br/>Format: Electronic Resources<br/>Introduction to Printed Electronicsent://SD_ILS/0/SD_ILS:197972024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Suganuma, Katsuaki. author.<br/><a href="http://dx.doi.org/10.1007/978-1-4614-9625-0">http://dx.doi.org/10.1007/978-1-4614-9625-0</a><br/>Format: Electronic Resources<br/>Application-Specific Hardware Architecture Design with VHDLent://SD_ILS/0/SD_ILS:2254672024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Belean, Bogdan. author.<br/><a href="https://doi.org/10.1007/978-3-319-65025-8">https://doi.org/10.1007/978-3-319-65025-8</a><br/>Format: Electronic Resources<br/>Advanced Logic Synthesisent://SD_ILS/0/SD_ILS:2260042024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Reis, André Inácio. editor.<br/><a href="https://doi.org/10.1007/978-3-319-67295-3">https://doi.org/10.1007/978-3-319-67295-3</a><br/>Format: Electronic Resources<br/>Micro-Relay Technology for Energy-Efficient Integrated Circuitsent://SD_ILS/0/SD_ILS:199382024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Kam, Hei. author.<br/><a href="http://dx.doi.org/10.1007/978-1-4939-2128-7">http://dx.doi.org/10.1007/978-1-4939-2128-7</a><br/>Format: Electronic Resources<br/>Design of Organic Complementary Circuits and Systems on Foilent://SD_ILS/0/SD_ILS:231152024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Abdinia, Sahel. author.<br/><a href="http://dx.doi.org/10.1007/978-3-319-21188-6">http://dx.doi.org/10.1007/978-3-319-21188-6</a><br/>Format: Electronic Resources<br/>Timing Performance of Nanometer Digital Circuits Under Process Variationsent://SD_ILS/0/SD_ILS:2230402024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Champac, Victor. author.<br/><a href="https://doi.org/10.1007/978-3-319-75465-9">https://doi.org/10.1007/978-3-319-75465-9</a><br/>Format: Electronic Resources<br/>Communications, Signal Processing, and Systems Proceedings of the 2016 International Conference on Communications, Signal Processing, and Systemsent://SD_ILS/0/SD_ILS:2260382024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Liang, Qilian. editor.<br/><a href="https://doi.org/10.1007/978-981-10-3229-5">https://doi.org/10.1007/978-981-10-3229-5</a><br/>Format: Electronic Resources<br/>Electronics for Embedded Systemsent://SD_ILS/0/SD_ILS:2221312024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Bindal, Ahmet. author.<br/><a href="https://doi.org/10.1007/978-3-319-39439-8">https://doi.org/10.1007/978-3-319-39439-8</a><br/>Format: Electronic Resources<br/>Non-logic Devices in Logic Processesent://SD_ILS/0/SD_ILS:2265192024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Ma, Yanjun. author.<br/><a href="https://doi.org/10.1007/978-3-319-48339-9">https://doi.org/10.1007/978-3-319-48339-9</a><br/>Format: Electronic Resources<br/>Soft Error Mechanisms, Modeling and Mitigationent://SD_ILS/0/SD_ILS:175322024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Sayil, Selahattin. author.<br/><a href="http://dx.doi.org/10.1007/978-3-319-30607-0">http://dx.doi.org/10.1007/978-3-319-30607-0</a><br/>Format: Electronic Resources<br/>Spintronics-based Computingent://SD_ILS/0/SD_ILS:223422024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Zhao, Weisheng. editor.<br/><a href="http://dx.doi.org/10.1007/978-3-319-15180-9">http://dx.doi.org/10.1007/978-3-319-15180-9</a><br/>Format: Electronic Resources<br/>Design for Manufacturability From 1D to 4D for 90–22 nm Technology Nodesent://SD_ILS/0/SD_ILS:195932024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Balasinski, Artur. author.<br/><a href="http://dx.doi.org/10.1007/978-1-4614-1761-3">http://dx.doi.org/10.1007/978-1-4614-1761-3</a><br/>Format: Electronic Resources<br/>Protecting Chips Against Hold Time Violations Due to Variabilityent://SD_ILS/0/SD_ILS:251742024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Neuberger, Gustavo. author.<br/><a href="http://dx.doi.org/10.1007/978-94-007-2427-3">http://dx.doi.org/10.1007/978-94-007-2427-3</a><br/>Format: Electronic Resources<br/>Foundations of Heterogeneous Integration: An Industry-Based, 2.5D/3D Pathfinding and Co-Design Approachent://SD_ILS/0/SD_ILS:2215812024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Yazdani, Farhang. author.<br/><a href="https://doi.org/10.1007/978-3-319-75769-8">https://doi.org/10.1007/978-3-319-75769-8</a><br/>Format: Electronic Resources<br/>PLD Based Design with VHDL RTL Design, Synthesis and Implementationent://SD_ILS/0/SD_ILS:2212132024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Taraate, Vaibbhav. author.<br/><a href="https://doi.org/10.1007/978-981-10-3296-7">https://doi.org/10.1007/978-981-10-3296-7</a><br/>Format: Electronic Resources<br/>Debug Automation from Pre-Silicon to Post-Siliconent://SD_ILS/0/SD_ILS:213182024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Dehbashi, Mehdi. author.<br/><a href="http://dx.doi.org/10.1007/978-3-319-09309-3">http://dx.doi.org/10.1007/978-3-319-09309-3</a><br/>Format: Electronic Resources<br/>Analysis and Design of Networks-on-Chip Under High Process Variationent://SD_ILS/0/SD_ILS:234812024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Ezz-Eldin, Rabab. author.<br/><a href="http://dx.doi.org/10.1007/978-3-319-25766-2">http://dx.doi.org/10.1007/978-3-319-25766-2</a><br/>Format: Electronic Resources<br/>Energy-Efficient Fault-Tolerant Systemsent://SD_ILS/0/SD_ILS:196102024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Mathew, Jimson. editor.<br/><a href="http://dx.doi.org/10.1007/978-1-4614-4193-9">http://dx.doi.org/10.1007/978-1-4614-4193-9</a><br/>Format: Electronic Resources<br/>Contactless VLSI Measurement and Testing Techniquesent://SD_ILS/0/SD_ILS:2238952024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Sayil, Selahattin. author.<br/><a href="https://doi.org/10.1007/978-3-319-69673-7">https://doi.org/10.1007/978-3-319-69673-7</a><br/>Format: Electronic Resources<br/>Computer-Aided Design of Microfluidic Very Large Scale Integration (mVLSI) Biochips Design Automation, Testing, and Design-for-Testabilityent://SD_ILS/0/SD_ILS:2245712024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Hu, Kai. author.<br/><a href="https://doi.org/10.1007/978-3-319-56255-1">https://doi.org/10.1007/978-3-319-56255-1</a><br/>Format: Electronic Resources<br/>Fundamentals of IP and SoC Security Design, Verification, and Debugent://SD_ILS/0/SD_ILS:2269632024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Bhunia, Swarup. editor.<br/><a href="https://doi.org/10.1007/978-3-319-50057-7">https://doi.org/10.1007/978-3-319-50057-7</a><br/>Format: Electronic Resources<br/>Memristor-Based Nanoelectronic Computing Circuits and Architecturesent://SD_ILS/0/SD_ILS:167932024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Vourkas, Ioannis. author.<br/><a href="http://dx.doi.org/10.1007/978-3-319-22647-7">http://dx.doi.org/10.1007/978-3-319-22647-7</a><br/>Format: Electronic Resources<br/>FPGAs and Parallel Architectures for Aerospace Applications Soft Errors and Fault-Tolerant Designent://SD_ILS/0/SD_ILS:165152024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Kastensmidt, Fernanda. editor.<br/><a href="http://dx.doi.org/10.1007/978-3-319-14352-1">http://dx.doi.org/10.1007/978-3-319-14352-1</a><br/>Format: Electronic Resources<br/>Fuzzy Logic Type 1 and Type 2 Based on LabVIEW™ FPGAent://SD_ILS/0/SD_ILS:170812024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Ponce-Cruz, Pedro. author.<br/><a href="http://dx.doi.org/10.1007/978-3-319-26656-5">http://dx.doi.org/10.1007/978-3-319-26656-5</a><br/>Format: Electronic Resources<br/>Microarchitecture of Network-on-Chip Routers A Designer's Perspectiveent://SD_ILS/0/SD_ILS:196122024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Dimitrakopoulos, Giorgos. author.<br/><a href="http://dx.doi.org/10.1007/978-1-4614-4301-8">http://dx.doi.org/10.1007/978-1-4614-4301-8</a><br/>Format: Electronic Resources<br/>A Route to Chaos Using FPGAs Volume I: Experimental Observationsent://SD_ILS/0/SD_ILS:227782024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Muthuswamy, Bharathwaj. author.<br/><a href="http://dx.doi.org/10.1007/978-3-319-18105-9">http://dx.doi.org/10.1007/978-3-319-18105-9</a><br/>Format: Electronic Resources<br/>Design of Arithmetic Circuits in Quantum Dot Cellular Automata Nanotechnologyent://SD_ILS/0/SD_ILS:225872024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Sridharan, K. author.<br/><a href="http://dx.doi.org/10.1007/978-3-319-16688-9">http://dx.doi.org/10.1007/978-3-319-16688-9</a><br/>Format: Electronic Resources<br/>Functional Verification of Dynamically Reconfigurable FPGA-based Systemsent://SD_ILS/0/SD_ILS:208952024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Gong, Lingkan. author.<br/><a href="http://dx.doi.org/10.1007/978-3-319-06838-1">http://dx.doi.org/10.1007/978-3-319-06838-1</a><br/>Format: Electronic Resources<br/>Computer Systems Digital Design, Fundamentals of Computer Architecture and Assembly Languageent://SD_ILS/0/SD_ILS:2241432024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Elahi, Ata. author.<br/><a href="https://doi.org/10.1007/978-3-319-66775-1">https://doi.org/10.1007/978-3-319-66775-1</a><br/>Format: Electronic Resources<br/>Digital Systems From Logic Gates to Processorsent://SD_ILS/0/SD_ILS:2226452024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Deschamps, Jean-Pierre. author.<br/><a href="https://doi.org/10.1007/978-3-319-41198-9">https://doi.org/10.1007/978-3-319-41198-9</a><br/>Format: Electronic Resources<br/>SystemC and SystemC-AMS in Practice SystemC 2.3, 2.2 and SystemC-AMS 1.0ent://SD_ILS/0/SD_ILS:200502024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Banerjee, Amal. author.<br/><a href="http://dx.doi.org/10.1007/978-3-319-01147-9">http://dx.doi.org/10.1007/978-3-319-01147-9</a><br/>Format: Electronic Resources<br/>Engineering Embedded Systems Physics, Programs, Circuitsent://SD_ILS/0/SD_ILS:215642024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Hintenaus, Peter. author.<br/><a href="http://dx.doi.org/10.1007/978-3-319-10680-9">http://dx.doi.org/10.1007/978-3-319-10680-9</a><br/>Format: Electronic Resources<br/>Nano Devices and Circuit Techniques for Low-Energy Applications and Energy Harvestingent://SD_ILS/0/SD_ILS:188252024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Kyung, Chong-Min. editor.<br/><a href="http://dx.doi.org/10.1007/978-94-017-9990-4">http://dx.doi.org/10.1007/978-94-017-9990-4</a><br/>Format: Electronic Resources<br/>Proceedings of the International Conference on Microelectronics, Computing & Communication Systems MCCS 2015ent://SD_ILS/0/SD_ILS:2261912024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Nath, Vijay. editor.<br/><a href="https://doi.org/10.1007/978-981-10-5565-2">https://doi.org/10.1007/978-981-10-5565-2</a><br/>Format: Electronic Resources<br/>VLSI Design: Circuits, Systems and Applications Select Proceedings of ICNETS2, Volume Vent://SD_ILS/0/SD_ILS:2242512024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Li, Jie. editor.<br/><a href="https://doi.org/10.1007/978-981-10-7251-2">https://doi.org/10.1007/978-981-10-7251-2</a><br/>Format: Electronic Resources<br/>Proceedings of the International Conference on Nano-electronics, Circuits & Communication Systemsent://SD_ILS/0/SD_ILS:2234812024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Nath, Vijay. editor.<br/><a href="https://doi.org/10.1007/978-981-10-2999-8">https://doi.org/10.1007/978-981-10-2999-8</a><br/>Format: Electronic Resources<br/>Microelectronics, Electromagnetics and Telecommunications Proceedings of ICMEET 2015ent://SD_ILS/0/SD_ILS:187822024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Satapathy, Suresh Chandra. editor.<br/><a href="http://dx.doi.org/10.1007/978-81-322-2728-1">http://dx.doi.org/10.1007/978-81-322-2728-1</a><br/>Format: Electronic Resources<br/>Computational Advancement in Communication Circuits and Systems Proceedings of ICCACCS 2014ent://SD_ILS/0/SD_ILS:251162024-08-22T20:54:50Z2024-08-22T20:54:50ZYazar Maharatna, Koushik. editor.<br/><a href="http://dx.doi.org/10.1007/978-81-322-2274-3">http://dx.doi.org/10.1007/978-81-322-2274-3</a><br/>Format: Electronic Resources<br/>